Private LTE with Analog ADALM-PLUTO v0.38 Update

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Introduction

Previously I got the open source LTE stack srsRAN working with the low cost Analog ADALM-PLUTO.

At the time the additional functionality was added to their 0.37 release. They’ve recently release v0.38, so I figured I’d give it the same treatment.

Changes

It appears the main changes between v0.37 and v0.38 are:

  • Linux kernel 5.10 -> 5.15
  • Buildroot 2022.02.3 -> 2023.02.5
  • Xilinx tools 2021.2 -> 2022.2

Analog have added some new logic within the FPGA design which appears to improve support AD636x RF transceiver’s Time Division Duplexing (TDD) mode.

As with my previous custom firmware, without timestamping enabled the firmware *should* behave identically to the official firmware. As such the new TDD module is included, however it currently conflicts with timestamping support.

The timestamping module and new TDD module share a common signal to the internal DMA controller. When timestamping is enabled it will make use of the shared line, in preference to the TDD controller. When disabled the TDD controller will make use of the line as in the official Analog firmware. Essentially this comes down to TDD + timestamping using the new module isn’t likely possible at present with the current timestamping arrangement at least.

For more information on Analog’s new TDD support see HDL support for AD9361 TDD mode and Generic Time-Division Duplexing Controller.

Pre-Built Images

If you’re just looking to try, I’ve released some pre-built images on GitHub. These can be installed and configured using the instructions from my original post.

Building

If you’d prefer to build from source, the following notes are adapted from Analog’s wiki. They’ve made a few tweaks to their build process, as such the following is subtly different from the previous v0.37 release.

Building the ADALM-PLUTO’s firmware requires installation of Xilinx’s Vivado Design Suite 2022.2. After which the firmware may be cloned and build as follows:

git clone --branch v0.38_timestamp --recurse-submodules --shallow-submodules https://github.com/pgreenland/plutosdr-fw.git
cd plutosdr-fw
make

Once complete (it takes a while) build artefacts will be available in the build directory. The two key images being pluto.dfu the RAM bootable image and pluto.frm the firmware update image.

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9 responses to “Private LTE with Analog ADALM-PLUTO v0.38 Update”

  1. amit malaghan avatar
    amit malaghan

    hi , i am getting this error when i try to install plutosdr-fw in pc

    rm -f
    rm -rf build/*
    make -C buildroot ARCH=arm zynq_pluto_defconfig
    make[1]: Entering directory ‘/home/student/Documents/5gcache/plutosdr-fw/buildroot’
    make[1]: *** No rule to make target ‘zynq_pluto_defconfig’. Stop.
    make[1]: Leaving directory ‘/home/student/Documents/5gcache/plutosdr-fw/buildroot’
    Makefile:62: recipe for target ‘TOOLCHAIN’ failed
    make: *** [TOOLCHAIN] Error 2

    1. Phil Greenland avatar
      Phil Greenland

      Hey Amit,

      Have you got the submodules cloned and checked out? The buildoot directory contains files?

      Thanks,

      Phil

  2. Alejandro avatar

    Hi Phil, We are planning to access the timestamping interface via the soapy module from the embedded processor in pluto, i.e. using the “local:” URI.
    Should we expect it to work as it is working via the USB? Or will it need further adaptations?

    1. Phil Greenland avatar
      Phil Greenland

      Hi Alejandro,

      It won’t work with the branch I reference for the LTE simulation, which supports USB (for the Pluto and Pluto+) and now IP (via another special interface) for the Pluto+.

      However I did adapt the native IIO interface to support timestamping. It wasn’t fast enough over the USB connection for LTE. It should work fine locally, as you’re planning though.

      I’ve just rebased and pushed the “IIO enabled” version here: https://github.com/pgreenland/SoapyPlutoSDR/tree/sdr_gadget_timestamping_with_iio_support

      I haven’t built it or tried it recently though I’m afraid.

      If you give it a go, there’s a python and C version of a loopback test (see the support directory) which you could run on the Pluto itself….presumably cross compiling the C version would be easiest?. If the output of those look sensible (no warnings or reports of missing packets) you should be in business.

      Happy to provide support where I can, let me know how you get on!

      Thanks,

      Phil

      1. Alejandro avatar

        Hi Phil, thank you very much for the clues. I already cross compiled it for Cortex-A9 and installed it in the sysroot-v0.38. It needed only some minor modifications of the CMakeLists.txt and a few changes because we installed not the latest version of boost in the sysroot.
        We will be testing it in the following days, and write you back with the results.
        Many thanks and best regards! Alejandro.

  3. Alejandro avatar

    Hi Phil, we recompiled plutosd-fw 0.38_timestamp branch in order to access the timestamping interface through the local iio uri.
    Everything goes ok except for the hdl compilation which is failing with the following error:
    ERROR: [BD 41-74] Exec TCL: Please specify VLNV when creating IP cell cpack_timestamp
    ERROR: [BD 5-7] Error: running create_bd_cell -type ip -name cpack_timestamp .
    ERROR: [Common 17-39] ‘create_bd_cell’ failed due to earlier errors.
    while executing
    “create_bd_cell -type ip -vlnv [get_ipdefs -all -filter “VLNV =~ :${i_ip}: && design_tool_contexts =~ IPI && UPGRADE_VERSIONS == “””] ${i_name}”
    (procedure “ad_ip_instance” line 3)
    invoked from within
    “ad_ip_instance util_cpack2_timestamp cpack_timestamp”
    (file “system_bd.tcl” line 241)

    Any Ideas how we could overcome this?

    Best regards, Alejandro.

    1. Phil Greenland avatar
      Phil Greenland

      I’ve not seen that one myself before. Are you running the same version as Vivado as Analog are using for the v0.38 build, 2022.2?

      Thanks,

      Phil

      1. Alejandro avatar

        Yes, Vivado 2022.2 (installed together with Vitis).
        Thanks and best regards, Alejandro.

        1. Phil Greenland avatar
          Phil Greenland

          Ah ok, I wasn’t sure if a later / earlier version might cause issues.

          I’ve kicked a fresh build off in the background, following my own instructions from the post.

          If it completes and you’re not worried about building the HDL yourself at the moment, I can drop you the hardware export. I believe this can be used by the firmware build, in place of performing the full synthesis yourself.

          Thanks,

          Phil

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